1. Field of the Invention
The present invention relates in general to the variable frame structure-based frequency adjustment in a digital communication field such as a satellite broadcast, a high definition television (HDTV), etc., and more particularly to a multiplexing/demultiplexing apparatus in a digital communication system with a variable frame structure and a method of controlling the same, in which different clocks are used at input and output stages by virtue of a general oscillator without deriving a data output clock from a data input clock, thereby preventing a transmission signal from being degraded in quality due to a phase noise or jitter.
2. Description of the Prior Art
Generally, a phase locked loop is adapted to extract a stable frequency signal and detect a phase of an input signal. Recently, according to developments in semiconductor techniques, the phase locked loop has been applied to the necessaries of life such as radio, TV, etc. and a control system such as a servo motor, as well as a communication system. Such a conventional phase locked loop is shown in block form in FIG. 2. As shown in this drawing, the conventional phase locked loop comprises a phase comparator 1, a loop filter 2 having a signal input terminal connected to a signal output terminal of the phase comparator 1, and a voltage controlled oscillator (VCO) 3 having a signal input terminal connected to a signal output terminal of the loop filter 2, and a signal output terminal connected to a feedback input terminal of the phase comparator 1.
In the conventional phase locked loop, the phase comparator 1 detects a phase difference between input and output signals, which is then passed through a low pass filter (LPF) of the loop filter 2. An output frequency of the VCO 3 is adjusted upward or downward according to the level of a control voltage from the loop filter 2. For example, in the case where the output frequency of the VCO 3 is higher than an input frequency, it is earlier in phase than the input frequency. In this case, the control voltage from the loop filter 2 is reduced, resulting in a reduction in the output frequency of the VCO 3. As a result, the output frequency of the VCO 3 becomes equal to the input frequency.
However, in the above-mentioned conventional phase locked loop, a data output clock is derived from a data input clock and then passed through the LPF. At this time, the data output clock is subjected to a natural phase noise, resulting in a degradation in the quality of a transmission signal.